Call for Papers

Registration

Programme

Workshop

Exhibiting

Accommodation

Contact Us

Home

 

Conference Schedule

Tuesday 10th June

08:00 - 17:00 Registration

09:00 - 17:00 Workshop: Counterfeit Components Avoidance Workshop (CCAW) Details

Wednesday 11th June

09:00 - 09:45
Keynote: Utilising COTS Technologies to produce viable robust components for military and industrial use.
Prof. John Roulston, CEO, Scimus Solutions Ltd.

09:45 - 12:00
Session 1: Impact of Pb Free Solder on Reliability I
Chairman: Lloyd Francis, Alter Technology Group UK

1.1 Lead-free Control Plans for Electronic Equipment
Intended for Aerospace & High Reliability Applications;

Robert Gregory, Rolls-Royce

1.2 Reliability Issues with IC’s & Pb Free Electronics;
Doug Patterson, Aitech Defense Systems, Inc.

1.3 RoHS Impact on COTS Military DC/DC Convertors;
Serge Manel, Campbell-Collins

12:00 - 14:00 - Lunch with Exhibits

14:00 - 16:00
Session 2: Impact of Pb Free Solder on Reliability II
Chairman: Brian Porter, Rolls Royce Submarines

2.1 RoHS Components in a Tin/Lead Solder Process;
Lloyd Francis, Alter Technology

2.2 Lead Free Initiatives - A New Look at Tin Whiskers & How Packaging Material Selection Can Help;
Keith W. Donaldson, Engineering Materials, Inc.

2.3 Effect of Lead-free Solder on Reliability of Electronic Circuits;
Ling Zou, National Physical Laboratory

2.4 Impact of Pb Free Solder in Harsh Environments;
O. Gaillard, E2V Semiconductors

16:00 - 17:00
Session 3: European Military Electronics
Chairman: Ian Blackman, Selex S & AS

3.1 Components Technology Development Within Europe;
Rob Coleman, Semelab Plc

3.2 An Introduction to Export Compliance & Design for
Compliance;
Nathan Robinson, IHS

17:00 - 19:00 - Reception in the Exhibition

Downloadable Programme & Registration Form

Thursday 12th June

09:00 - 12:00
Session 4: Reliability Improvements & Rad Hard Data
Chairman: Alun Jones, TS2 Micro

4.1 Semiconductor Reliability: The Effects of Shrinking Geometries;
Hugh De Lacy, TS2 Micro

4.2 A Guide to COTS Qualification & Safe Usage;
Ron Fidler, Alter Technology

4.3 Dielectric Quality with Step Surge Stress Testing (SSST), Scintillation Testing, & Proofing;
Paul Staubli, KEMET Electronics SA

4.4 Established Reliability Tantalum Chips for Maximum Payload Advantage;
Tom Zednicek, AVX

4.5 Characterising the Effects of Low Dose Rate Gamma Radiation on Bipolar Semiconductors;
Steve Munns, Linear Technology Corp.

4.6 Radiation Sensitivity Characterization of Silicon Devices for Military & Aerospace Applications;
Ahmed Iftikhar, Bernd Tabbert, Alexander Goushcha, Semicoa

4.7 Single-Event Upset and Soft Error Rate in Microprocessors;
Dominique Bellin, E2V Semiconductors

12:00 - 13:00 - Lunch with Exhibits

13:00 - 16:00
Session 5: COTS Approaches & Experience
Chairman: Mikko Nikulainen, ESTEC/ESA

5.1 High Density, High Efficiency, Light Weight MIL-COTS DC-DC Solutions;
Arthur Jordan, Vicor

5.2 Using COTS DIE in High Reliability Applications;
Roger Buckley, Lloyd Francis, Alter Technology Group UK

5.3 Commercial Hi-Rel Tantalum Capacitors: Combining Reliability Performance with the Latest in Capacitor Technology;
Charles Pothier, Vishay Intertechnology, Inc.

5.4 Product Lifecycle Management
Martin Holmes. GE Fanuc

5.5 An Architectural Approach to SEFI Mitigation for COTS-Based Spacecraft's Data Handling Systems;
Ben Taylor, University of Surrey

5.6 Application Practices for HiRel COTS Electronics;
Paul Gibbard, Welwyn Components Ltd

5.7 Mission Imposter;
J. Fredrico, NJ Electronics Testing

Close of CMSE-Europe